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Disambiguation of "Mehendale, Mahesh"

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A Sparsity-driven tinyML Accelerator for Decoding Hand Kinematics in Brain-Computer Interfaces.

, , , , , , and . BioCAS, page 1-5. IEEE, (2023)

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Mahesh Darna

Mahesh Kandasamy

Mahesh Darna

Mahesh Sooriyabandara

Mahesh Appari

 

Other publications of authors with the same name

Integrated IC design approach based on software engineering paradigm., and . CICC, page 53-56. IEEE, (1999)Challenges in the Design of Embedded Real-time DSP SoCs.. VLSI Design, page 507-511. IEEE Computer Society, (2004)Multivoltage scheduling with voltage-partitioned variable storage., , and . ISLPED, page 298-301. ACM, (2003)FDT-a design tool for switched capacitor filters., , , , , and . ICCAD, page 446-449. IEEE Computer Society, (1989)Bi-Modal DRAM Cache: Improving Hit Rate, Hit Latency and Bandwidth., , , and . MICRO, page 38-50. IEEE Computer Society, (2014)Emerging markets: design goes global., , , , , , and . DAC, page 195. ACM, (2003)DBQ: A Differentiable Branch Quantizer for Lightweight Deep Neural Networks., , , and . ECCV (27), volume 12372 of Lecture Notes in Computer Science, page 90-106. Springer, (2020)A Sparsity-driven tinyML Accelerator for Decoding Hand Kinematics in Brain-Computer Interfaces., , , , , , and . BioCAS, page 1-5. IEEE, (2023)An area-efficient 6T-SRAM based Compute-In-Memory architecture with reconfigurable SAR ADCs for energy-efficient deep neural networks in edge ML applications., , , and . CICC, page 1-2. IEEE, (2022)A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems., , , , and . VLSID, page 171-176. IEEE Computer Society, (2018)