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On the Constant Diagnosability of Baseline Interconnection Networks.

, and . IEEE Trans. Computers, 39 (12): 1485-1488 (1990)

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Diagnosing Programmable Interconnect Systems for FPGAs., , , and . FPGA, page 100-106. ACM, (1996)Accurate communication models for task scheduling in multicomputers., , , and . SPDP, page 524-529. IEEE, (1995)Novel Approaches for Fault Detection in Two-Dimensional Combinational Arrays., , , , and . DFT, page 161-169. IEEE Computer Society, (2001)On the Complexity of Sequential Testing in Configurable FPGAs., , , and . DFT, page 164-. IEEE Computer Society, (1998)Design Verification of FPGA Implementations., , , , and . IEEE Des. Test Comput., 16 (2): 66-73 (1999)New approaches for the repairs of memories with redundancy by row/column deletion for yield enhancement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (3): 323-328 (1990)On the Constant Diagnosability of Baseline Interconnection Networks., and . IEEE Trans. Computers, 39 (12): 1485-1488 (1990)Testing programmable interconnect systems: an algorithmic approach., , and . Asian Test Symposium, page 311-316. IEEE Computer Society, (2000)A XOR-Tree Based Technique for Constant Testability of Configurable FPGAs., , , and . Asian Test Symposium, page 248-253. IEEE Computer Society, (1997)On an improved design approach for C-testable orthogonal iterative arrays., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (5): 609-615 (1988)