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A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction.

M. Terada, S. Yoshimoto, S. Okumura, T. Suzuki, S. Miyano, H. Kawaguchi, and M. Yoshimoto. ISQED, page 489-492. IEEE, (2012)

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Masaharu Imai

Masaharu Oba

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A 40-nm 256-Kb Sub-10 pJ/Access 8t SRAM with read bitline amplitude limiting (RBAL) scheme.S. Yoshimoto, M. Terada, Y. Umeki, S. Okumura, A. Kawasumi, T. Suzuki, S. Moriwaki, S. Miyano, H. Kawaguchi, and M. Yoshimoto. ISLPED, page 85-90. ACM, (2012)A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM using low-power disturb mitigation technique.S. Yoshimoto, M. Terada, S. Okumura, T. Suzuki, S. Miyano, H. Kawaguchi, and M. Yoshimoto. ASP-DAC, page 77-78. IEEE, (2013)A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction.M. Terada, S. Yoshimoto, S. Okumura, T. Suzuki, S. Miyano, H. Kawaguchi, and M. Yoshimoto. ISQED, page 489-492. IEEE, (2012)Information and communication technology infrastructure and management for collaboration with regional universities and colleges.T. Yamanoue, R. Fouser, T. Wada, M. Hidaka, Y. Suzuki, M. Terada, A. Takenoshita, Y. Beppu, Y. Nedachi, K. Yukawa and 11 other author(s). SIGUCCS, page 25-30. ACM, (2011)A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme.S. Yoshimoto, M. Terada, S. Okumura, T. Suzuki, S. Miyano, H. Kawaguchi, and M. Yoshimoto. IEICE Trans. Electron., 95-C (4): 572-578 (2012)A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique.S. Yoshimoto, M. Terada, S. Okumura, T. Suzuki, S. Miyano, H. Kawaguchi, and M. Yoshimoto. IEICE Electron. Express, 9 (12): 1023-1029 (2012)

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Disambiguation of "Terada, Masaharu"

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A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction.

Please choose a person to relate this publication to

Masaharu Imai

Masaharu Oba

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Terada, Masaharu"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction.

Please choose a person to relate this publication to

Masaharu Imai

Masaharu Oba

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction.