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Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks.

, , , , , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (7): 2475-2487 (2016)

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Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks., , , , , , , , , and 2 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 24 (7): 2475-2487 (2016)Adaptive power delivery system management for many-core processors with on/off-chip voltage regulators., , , , , and . DATE, page 1265-1268. IEEE, (2017)Workload-Aware Adaptive Power Delivery System Management for Many-Core Processors., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (10): 2076-2086 (2018)MOCA: an Inter/Intra-Chip Optical Network for Memory., , , , , , , , , and . DAC, page 86:1-86:6. ACM, (2017)Chip-Specific Power Delivery and Consumption Co-Management for Process-Variation-Aware Manycore Systems Using Reinforcement Learning., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (5): 1150-1163 (2020)Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign., , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 13 (2): 19:1-19:24 (2016)An Adaptive Process-Variation-Aware Technique for Power-Gating-Induced Power/Ground Noise Mitigation in MPSoC., , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (12): 3373-3386 (2016)Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (3): 626-639 (2020)JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models., , , , , , , , and . AISTECS@HiPEAC, page 8:1-8:6. ACM, (2016)Fast and Accurate Statistical Simulation of Shared-Memory Applications on Multicore Systems., , , , , , and . IEEE Trans. Parallel Distributed Syst., 33 (10): 2455-2469 (2022)