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Layout-Dependent Effects-Aware Analytical Analog Placement., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (8): 1243-1254 (2016)QB-trees: towards an optimal topological representation and its applications to analog layout designs., , and . DAC, page 80:1-80:6. ACM, (2016)Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits., , , and . DAC, page 6:1-6:6. ACM, (2013)Double patterning lithography-aware analog placement., , , , and . DAC, page 4:1-4:6. ACM, (2013)Non-uniform multilevel analog routing with matching constraints., , and . DAC, page 549-554. ACM, (2012)Simultaneous analog placement and routing with current flow and current density considerations., , and . DAC, page 5:1-5:6. ACM, (2013)Heterogeneous B∗-trees for analog placement with symmetry and regularity considerations., , and . ICCAD, page 512-516. IEEE Computer Society, (2011)Layout-dependent-effects-aware analytical analog placement., , , , and . DAC, page 189:1-189:6. ACM, (2015)Cutting structure-aware analog placement based on self-aligned double patterning with e-beam lithography., , and . DAC, page 190:1-190:6. ACM, (2015)Coupling-Aware Length-Ratio-Matching Routing for Capacitor Arrays in Analog Integrated Circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (2): 161-172 (2015)