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Disambiguation of "Faraone, Julian"

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SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks.

, , , and . CVPR, page 4300-4309. Computer Vision Foundation / IEEE Computer Society, (2018)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Julian Gonska

Mikromechanische Biegebalken als hochsensitive Sensoren. Uni Freiburg, (2009)

Julian Grapengiesser

Mit Ungewissheit planen: eine Untersuchung verschiedener Ansätze der Handhabung von Ungewissheit in komplexen Planungsprozessen. Uni Stuttgart, (2009)

Julian Künzel

Rolle neurotroper und muskulotroper Spasmolytika in der In-vitro-Fertilisation (IVF): Untersuchungen am perfundierten Schweineuterus. Uni Erlangen-Nürnberg, (2009)

Julian Horst

Die verbindliche Auskunft nach § 89 Abgabenordnung. Uni Münster, (2009)

Ernst Julian

 

Other publications of authors with the same name

Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks., , , , and . ICONIP (2), volume 10635 of Lecture Notes in Computer Science, page 393-404. Springer, (2017)SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks., , , and . CVPR, page 4300-4309. Computer Vision Foundation / IEEE Computer Society, (2018)Long Short-Term Memory for Radio Frequency Spectral Prediction and its Real-Time FPGA Implementation., , , , , , , and . MILCOM, page 1-9. IEEE, (2018)Super Efficient Neural Network for Compression Artifacts Reduction and Super Resolution., , , , and . WACV (Workshops), page 460-468. IEEE, (2024)Training Deep Neural Networks in Low-Precision with High Accuracy Using FPGAs., , , , and . FPT, page 1-9. IEEE, (2019)Redundancy-Reduced MobileNet Acceleration on Reconfigurable Logic for ImageNet Classification., , , , , , and . ARC, volume 10824 of Lecture Notes in Computer Science, page 16-28. Springer, (2018)A Block Minifloat Representation for Training Deep Neural Networks., , , , and . ICLR, OpenReview.net, (2021)Customizing Low-Precision Deep Neural Networks for FPGAs., , , , , and . FPL, page 97-100. IEEE Computer Society, (2018)