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A Built-In Self-Repair Scheme for 3-D RAMs With Interdie Redundancy., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (4): 572-583 (2013)A Multiobjective Hybrid Genetic Algorithm for TFT-LCD Module Assembly Scheduling., , and . IEEE Trans Autom. Sci. Eng., 11 (3): 692-705 (2014)A built-in self-test scheme for 3D RAMs., , , , , , and . ITC, page 1-9. IEEE Computer Society, (2012)Post-bond test techniques for TSVs with crosstalk faults in 3D ICs., , and . VLSI-DAT, page 1-4. IEEE, (2012)Hierarchical Test Integration Methodology for 3-D ICs., , , , , and . IEEE Des. Test, 32 (4): 59-70 (2015)Testing Inter-Word Coupling Faults of Wide I/O DRAMs., , and . ATS, page 67-72. IEEE Computer Society, (2015)A Test Integration Methodology for 3D Integrated Circuits., , , , , and . Asian Test Symposium, page 377-382. IEEE Computer Society, (2010)Autonomous Deployment of UAVs as Access Points to Serve Wireless Terminals., and . VTC Fall, page 1-5. IEEE, (2017)Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs., , and . DELTA, page 3-7. IEEE Computer Society, (2010)A low-cost built-in self-test scheme for an array of memories., , and . ETS, page 75-80. IEEE Computer Society, (2010)