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ECDSA Signature Processing over Prime Fields for Reconfigurable Embedded Systems.

, , , , and . ReCoSoC, volume 7551 of KIT Scientific Reports, page 115-120. KIT Scientific Publishing, (2010)

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WCET-aware Code Generation and Communication Optimization for Parallelizing Compilers., and . DATE, page 210-215. IEEE, (2020)Automatic Floorplanning and Standalone Generation of Bitstream-Level IP Cores., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (1): 38-50 (2021)Evaluation of performance and architectural efficiency of FPGAs and GPUs in the 40 and 28 nm generations for algorithms in 3D ultrasound computer tomography., , , and . Comput. Electr. Eng., 40 (4): 1171-1185 (2014)Transparent Near-Memory Computing with a Reconfigurable Processor., , and . ARC, volume 12700 of Lecture Notes in Computer Science, page 221-231. Springer, (2021)Using Trace Data for Run-Time Optimization of Parallel Execution in Real-Time Multi-Core Systems., , , and . RTCSA, page 228-234. IEEE, (2022)PREUNN: Protocol Reverse Engineering using Neural Networks., , , , and . ICISSP, page 345-356. SCITEPRESS, (2022)Ultra-low Power Machinery Fault Detection Using Deep Neural Networks., , , and . PKDD/ECML Workshops (1), volume 1524 of Communications in Computer and Information Science, page 390-396. Springer, (2021)Data Movement Reduction for DNN Accelerators: Enabling Dynamic Quantization Through an eFPGA., , , , and . ISVLSI, page 371-372. IEEE, (2022)Mitigating Masking in Automotive Communication Systems: Modeling and Hardware Generation., , , and . DSD, page 561-568. IEEE, (2023)Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks., , , and . DSD, page 107-114. IEEE, (2021)