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Incremental Testability Analysis for Partial Scan Selection and Design Transformations., and . J. Electron. Test., 14 (1-2): 103-113 (1999)Bandwidth-efficient controller-server co-design with stability guarantees., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving., , , , and . J. Electron. Test., 24 (1-3): 247-257 (2008)Schedulability-driven frame packing for multicluster distributed embedded systems., , and . ACM Trans. Embed. Comput. Syst., 4 (1): 112-140 (2005)Timing analysis and conditional scheduling in a real-time system design environment., and . RTS, page 214-219. IEEE, (1994)Process-variation and temperature aware soc test scheduling using particle swarm optimization., , and . IDT, page 1-6. IEEE, (2011)Dynamic configuration prefetching based on piecewise linear prediction., , and . DATE, page 815-820. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Cache-Aware Kernel Tiling: An Approach for System-Level Performance Optimization of GPU-Based Applications., , , and . DATE, page 570-575. IEEE, (2019)Minimization of average execution time based on speculative FPGA configuration prefetch., , and . ReConFig, page 1-8. IEEE, (2012)Compiling VHDL into a high-level synthesis design representation., , , and . EURO-DAC, page 604-609. IEEE Computer Society Press, (1992)