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Register File Management and Compiler Optimization on EDSMT., , and . ISPA Workshops, volume 4743 of Lecture Notes in Computer Science, page 394-403. Springer, (2007)Wormhole Bubble in Torus Networks., and . NCCET, volume 396 of Communications in Computer and Information Science, page 73-80. Springer, (2013)A Dynamic Multi-precision Fixed-Point Data Quantization Strategy for Convolutional Neural Network., , , and . NCCET, volume 666 of Communications in Computer and Information Science, page 102-111. Springer, (2016)DrAcc: a DRAM based accelerator for accurate CNN inference., , , , and . DAC, page 168:1-168:6. ACM, (2018)Towards warp-scheduler friendly STT-RAM/SRAM hybrid GPGPU register file design., , , and . ICCAD, page 736-742. IEEE, (2017)A Novel Hybrid Last Level Cache Based on Multi-retention STT-RAM Cells., , , and . ACA, volume 626 of Communications in Computer and Information Science, page 28-39. Springer, (2016)Accelerating Nyström Kernel Independent Component Analysis with Many Integrated Core Architecture., , , , and . NCCET, volume 666 of Communications in Computer and Information Science, page 168-176. Springer, (2016)Dimensional Bubble Flow Control and Fully Adaptive Routing in the 2-D Mesh Network on Chip., , , and . EUC (1), page 353-358. IEEE Computer Society, (2008)Adaptive Bubble Scheme with Minimal Buffers in Torus Networks., , , and . HPCC-ICESS, page 914-919. IEEE Computer Society, (2012)Performance Optimization of Conventional MOS-Like Carbon Nanotube-FETs Based on Dual-Gate-Material., , , and . ISVLSI, page 277-281. IEEE Computer Society, (2010)