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Register Bank Assignment for Spatially Partitioned Processors.

, , , and . LCPC, volume 5335 of Lecture Notes in Computer Science, page 64-79. Springer, (2008)

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HASIL: hardware assisted software-based IP lookup for large routing tables., , , and . ICON, page 99-104. IEEE, (2003)Augmenting general purpose processors for network processing., , , and . FPT, page 416-419. IEEE, (2003)Evolving Compiler Heuristics to Manage Communication and Contention., , , , , and . AAAI, page 1690-1693. AAAI Press, (2010)Exploiting criticality to reduce bottlenecks in distributed uniprocessors., , , and . HPCA, page 431-442. IEEE Computer Society, (2011)Computational Storage For Big Data Analytics., , , , , and . ADMS@VLDB, page 55-63. (2019)An evaluation of the TRIPS computer system., , , , , , , , , and 3 other author(s). ASPLOS, page 1-12. ACM, (2009)NPSMT: A Simulation Environment for SMT Packet Processors., , and . PDCS, page 151-156. ISCA, (2004)Optimizing SMT processors for IP-packet processing., , and . Microprocess. Microsystems, 29 (7): 337-349 (2005)A Scheduling Framework for Spatial Architectures Across Multiple Constraint-Solving Theories., , , , , and . ACM Trans. Program. Lang. Syst., 37 (1): 2:1-2:30 (2014)How to implement effective prediction and forwarding for fusable dynamic multicore architectures., , , , , , , and . HPCA, page 460-471. IEEE Computer Society, (2013)