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Sneak-Path Based Test and Diagnosis for 1R RRAM Crossbar Using Voltage Bias Technique., , , , и . DAC, стр. 38:1-38:6. ACM, (2017)A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (7): 1192-1205 (2016)HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing., , , , , и . ASP-DAC, стр. 249-254. ACM, (2019)Approximate Random Dropout for DNN training acceleration in GPGPU., , , , , , , и . DATE, стр. 108-113. IEEE, (2019)Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar., , , , , , и . DATE, стр. 19-24. IEEE, (2017)CNFET-based high throughput register file architecture., , , , и . ICCD, стр. 662-669. IEEE Computer Society, (2016)N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores., , , , , , и . FPGA, стр. 112-122. ACM, (2022)PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation., , и . ACM TUR-C, стр. 49-50. ACM, (2023)Mitigating the Impact of Process Variations on Processor Register Files and Execution Units., и . MICRO, стр. 504-514. IEEE Computer Society, (2006)Process Variation Tolerant 3T1D-Based Cache Architectures., , , и . MICRO, стр. 15-26. IEEE Computer Society, (2007)