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Interconnect peak current reduction for wavelet array processor using self-timed signaling.

P. Liljeberg, I. Dhaou, J. Plosila, J. Isoaho, and H. Tenhunen. ISCAS (4), page 485-488. IEEE, (2002)

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Maria Liljeberg

Pasi Lehtimäki

Agnieszka Pasieka

John Pasi

Pasi Suvikunnas

Other publications of authors with the same name

Cluster-based topologies for 3D stacked architectures.M. Daneshtalab, M. Ebrahimi, P. Liljeberg, J. Plosila, and H. Tenhunen. Conf. Computing Frontiers, page 14. ACM, (2011)Power and performance optimization of voltage/frequency island-based networks-on-chip using reconfigurable synchronous/bi-synchronous FIFOs.A. Rahmani, P. Liljeberg, J. Plosila, and H. Tenhunen. Conf. Computing Frontiers, page 267-276. ACM, (2010)ARB-NET: A novel adaptive monitoring platform for stacked mesh 3D NoC architectures.A. Rahmani, K. Latif, K. Vaddina, P. Liljeberg, J. Plosila, and H. Tenhunen. ASP-DAC, page 413-418. IEEE, (2012)Edge-centric Optimization of Multi-modal ML-driven eHealth Applications.A. Kanduri, S. Shahhosseini, E. Naeini, H. Alikhani, P. Liljeberg, N. Dutt, and A. Rahmani. CoRR, (2022)Power and Area Optimization of 3D Networks-on-Chip Using Smart and Efficient Vertical Channels.A. Rahmani, K. Vaddina, P. Liljeberg, J. Plosila, and H. Tenhunen. PATMOS, volume 6951 of Lecture Notes in Computer Science, page 278-287. Springer, (2011)A Minimal Average Accessing Time Scheduler for Multicore Processors.T. Xu, P. Liljeberg, and H. Tenhunen. ICA3PP (2), volume 7017 of Lecture Notes in Computer Science, page 287-299. Springer, (2011)A Real-time PPG Quality Assessment Approach for Healthcare Internet-of-Things.E. Naeini, I. Azimi, A. Rahmani, P. Liljeberg, and N. Dutt. ANT/EDI40, volume 151 of Procedia Computer Science, page 551-558. Elsevier, (2019)Refinement of on-chip communication channels.J. Plosila, P. Liljeberg, and J. Isoaho. SoC, page 197-200. IEEE, (2004)Trio: A Triple Class On-chip Network Design for Efficient Multicore Processors.T. Xu, V. Leppänen, P. Liljeberg, J. Plosila, and H. Tenhunen. HPCC/CSS/ICESS, page 951-956. IEEE, (2015)SHiFA: System-Level Hierarchy in Run-Time Fault-Aware Management of Many-Core Systems.M. Fattah, M. Palesi, P. Liljeberg, J. Plosila, and H. Tenhunen. DAC, page 101:1-101:6. ACM, (2014)

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Disambiguation of "Liljeberg, Pasi"

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Interconnect peak current reduction for wavelet array processor using self-timed signaling.

Please choose a person to relate this publication to

Maria Liljeberg

Pasi Lehtimäki

Agnieszka Pasieka

John Pasi

Pasi Suvikunnas

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Liljeberg, Pasi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Interconnect peak current reduction for wavelet array processor using self-timed signaling.

Please choose a person to relate this publication to

Maria Liljeberg

Pasi Lehtimäki

Agnieszka Pasieka

John Pasi

Pasi Suvikunnas

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Interconnect peak current reduction for wavelet array processor using self-timed signaling.