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Disambiguation of "Kim, Cheol Hong"

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An FPGA-Based Implementation of a Pipelined FFT Processor for High-Speed Signal Processing Applications.

, , , and . ARC, volume 10216 of Lecture Notes in Computer Science, page 81-89. (2017)

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Cheol Kim

Cheol-Hong Yoon

Hee-Cheol Kim

Hyun Cheol Kim

Yong-Cheol Kim

 

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A Hybrid Feature Model and Deep-Learning-Based Bearing Fault Diagnosis., , and . Sensors, 17 (12): 2876 (2017)Design space exploration in many-core processors for sound synthesis of plucked string instruments., , , , and . J. Parallel Distributed Comput., 73 (11): 1506-1522 (2013)A high-performance, resource-efficient, reconfigurable parallel-pipelined FFT processor for FPGA platforms., , , and . Microprocess. Microsystems, (2018)Highly reliable state monitoring system for induction motors using dominant features in a two-dimension vibration signal., , , and . New Rev. Hypermedia Multim., 19 (3-4): 248-258 (2013)An optimal many-core model-based supercomputing for accelerating video-equipped fire detection., , , and . J. Supercomput., 71 (6): 2275-2308 (2015)Measuring Variance between Smartphone Energy Consumption and Battery Life., , , and . Computer, 47 (7): 59-65 (2014)A GPU-based (8, 4) Hamming decoder for secure transmission of watermarked medical images., , and . Clust. Comput., 18 (1): 333-341 (2015)Thermal-Aware Floorplan Schemes for Reliable 3D Multi-core Processors., , , , , and . ICCSA (2), volume 6783 of Lecture Notes in Computer Science, page 463-474. Springer, (2011)Hybrid Technique for Reducing Energy Consumption in High Performance Embedded Processor., , , and . EUC, volume 3207 of Lecture Notes in Computer Science, page 74-84. Springer, (2004)Exploring the Relation between Monolithic 3D L1 GPU Cache Capacity and Warp Scheduling Efficiency., , , , and . ISLPED, page 1-6. IEEE, (2019)