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Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication., , , and . IEEE Micro, 27 (1): 94-104 (2007)Wish Branches: Enabling Adaptive and Aggressive Predicated Execution., , , and . IEEE Micro, 26 (1): 48-58 (2006)Checkpoint Repair for High-Performance Out-of-Order Execution Machines., and . IEEE Trans. Computers, 36 (12): 1496-1514 (1987)An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors., , , and . IEEE Trans. Computers, 54 (12): 1556-1571 (2005)Optimal and Near-Optimal Universal Logic Modules with Interconnected External Terminals.. IEEE Trans. Computers, 22 (10): 903-907 (1973)Enhancing instruction scheduling with a block-structured ISA., and . Int. J. Parallel Program., 23 (3): 221-243 (1995)Recovery requirements of branch prediction storage structures in the presence of mispredicted-path execution., , , and . Int. J. Parallel Program., 25 (5): 363-383 (1997)Increasing the Instruction Fetch Rate via Block-Structured Instruction Set Architectures., , , and . Int. J. Parallel Program., 26 (4): 449-478 (1998)Highest performance computing machines.. Microprocess. Microprogramming, 35 (1-5): 1 (1992)Alternative implementations of Prolog: the microarchitecture perspective.. IEEE Trans. Syst. Man Cybern., 19 (4): 693-698 (1989)