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Disambiguation of "Ando, Yoshinori"

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Multiwalled carbon nanotubes grown in hydrogen atmosphere: An x-ray diffraction study

, , , , , , , , , , and . Phys. Rev. B, 64 (7): 073105 (July 2001)
DOI: 10.1103/PhysRevB.64.073105

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Yoshinori Aso

Ando Seeberg

Junko Ando

Sanae Ando

Ando Welling

 

Other publications of authors with the same name

A 20ns-write 45ns-read and 1014-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors., , , , , , , , , and 2 other author(s). ISSCC, page 484-486. IEEE, (2018)Production of carbon nanotubes.. MHS, page 4. IEEE, (2012)Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power Gating., , , , , , , , , and . ISSCC, page 212-213. IEEE, (2023)1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS., , , , , , , , , and 6 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Multiwalled carbon nanotubes grown in hydrogen atmosphere: An x-ray diffraction study, , , , , , , , , and 1 other author(s). Phys. Rev. B, 64 (7): 073105 (July 2001)Soft- and Hard-Error Radiation Reliability of 228 KB $3T+1C$ Oxide Semiconductor Memory., , , , , , , , , and 6 other author(s). IRPS, page 1-6. IEEE, (2023)A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs., , , , , , , , , and 1 other author(s). VLSI Circuits, page 48-. IEEE, (2019)Chemical Vapor Deposition of Carbon Nanotubes: A Review on Growth Mechanism and Mass Production, and . Journal of Nanoscience and Nanotechnology, (2010)Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM., , , , , , , , , and 6 other author(s). IMW, page 1-4. IEEE, (2024)Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS., , , , , , , , , and 6 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)