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An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion.

, , , , , , , , , , , , , , , , , , , , , , , и . IEEE J. Solid State Circuits, 43 (1): 121-131 (2008)

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Ho-Kyoung Lee

Su-Kyoung Kim

Kyoung-Ja Kim

Kyoung-Nam Kim

Min-Kyoung Kim

 

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