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Disambiguation of "Saileshwar, Gururaj"

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Practical Timing Side-Channel Attacks on Memory Compression.

, , , , , and . SP, page 1186-1203. IEEE, (2023)

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Karthik Gururaj

 

Other publications of authors with the same name

Mentoring Opportunities in Computer Architecture: Analyzing the Past to Develop the Future., , , , , , and . WCAE, page 1-9. IEEE, (2021)The Mirage of Breaking MIRAGE: Analyzing the Modeling Pitfalls in Emerging Ättacks" on MIRAGE., and . IEEE Comput. Archit. Lett., 22 (2): 121-124 (July 2023)Lookout for Zombies: Mitigating Flush+Reload Attack on Shared Caches by Monitoring Invalidated Lines., and . CoRR, (2019)Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems., , and . CoRR, (2022)PT-Guard: Integrity-Protected Page Tables to Defend Against Breakthrough Rowhammer Attacks., , , , , and . DSN, page 95-108. IEEE, (2023)MIRAGE: Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative Design., and . CoRR, (2020)Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping., , , , , and . IEEE Comput. Archit. Lett., 22 (1): 53-56 (January 2023)CMOS low-noise signal conditioning with a novel differential "resistance to frequency" converter for resistive sensor applications., , , , and . ISOCC, page 298-301. IEEE, (2011)MIRAGE: Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative Design., and . USENIX Security Symposium, page 1379-1396. USENIX Association, (2021)AQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at Runtime., , , and . MICRO, page 108-123. IEEE, (2022)