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Power distribution analysis of VLSI interconnects using model orderreduction., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (6): 739-745 (2002)Low Power VLSI Circuit Design with Fine-Grain Voltage Engineering., и . IPSJ Trans. Syst. LSI Des. Methodol., (2009)A 6.78-MHz Multiple-Transmitter Wireless Power Transfer System With Efficiency Maximization by Adaptive Magnetic Field Adder IC., , и . IEEE J. Solid State Circuits, 57 (8): 2390-2403 (2022)A super cut-off CMOS (SCCMOS) scheme for 0.5-V supply voltage with picoampere stand-by current., , и . IEEE J. Solid State Circuits, 35 (10): 1498-1501 (2000)Statistical leakage current reduction in high-leakage environments using locality of block activation in time domain., , и . IEEE J. Solid State Circuits, 39 (9): 1497-1503 (2004)High-Speed Searching of Optimum Switching Pattern for Digital Active Gate Drive to Adapt to Various Load Conditions., , , , , , , и . IEEE Trans. Ind. Electron., 69 (5): 5185-5194 (2022)A 1.8V 30nJ adaptive program-voltage (20V) generator for 3D-integrated NAND flash SSD., , , , , , и . ISSCC, стр. 238-239. IEEE, (2009)A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking., , , , , , , и . ISSCC, стр. 244-245. IEEE, (2009)Reducing IR drop in 3D integration to less than 1/4 using Buck Converter on Top die (BCT) scheme., , , , , , , и . ISQED, стр. 210-215. IEEE, (2013)A 0.14pJ/b Inductive-Coupling Inter-Chip Data Transceiver with Digitally-Controlled Precise Pulse Shaping., , , и . ISSCC, стр. 358-608. IEEE, (2007)