Author of the publication

Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs.

, , and . ACM Trans. Design Autom. Electr. Syst., 11 (3): 626-658 (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A hypergraph-based model for port allocation on multiple-register-file VLIW architectures., , and . Int. J. Parallel Program., 23 (6): 499-513 (1995)Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores., , , , , and . IEEE Trans. Multi Scale Comput. Syst., 4 (4): 944-951 (2018)Memory architecture exploration for programmable embedded systems., , and . Kluwer, (2003)Customizing Software Toolkits for Embedded Systems-On-Chip., , and . DIPES, volume 189 of IFIP Conference Proceedings, page 87-98. Kluwer, (2000)Data Partitioning Techniques for Partially Protected Caches to Reduce Soft Error Induced Failures., , , and . DIPES, volume 271 of IFIP, page 213-225. Springer, (2008)Novel Brain-Derived Algorithms Scale Linearly with Number of Processing Elements., , , , , , , and . PARCO, volume 15 of Advances in Parallel Computing, page 767-776. IOS Press, (2007)Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation, and . CoRR, (2007)ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement, , , , and . CoRR, (2007)A Unified code generation approach using mutation scheduling., , and . Code Generation for Embedded Processors, page 203-218. Kluwer, (1994)Fast Configurable-Cache Tuning With a Unified Second-Level Cache., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (1): 80-91 (2009)