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Memory Requirements for Convolutional Neural Network Hardware Accelerators.

K. Siu, D. Stuart, M. Mahmoud, and A. Moshovos. IISWC, page 111-121. IEEE Computer Society, (2018)

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Sarah Malone

Helga Malone

Almut Malone

Stuart Taylor

Stuart Fiske

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GPU - Accelerated Parameter Selection for Neural Connectivity Analysis Devices.G. O'Leary, I. Taras, D. Stuart, J. Koerner, D. Groppe, T. Valiante, and R. Genov. BioCAS, page 1-4. IEEE, (2018)Investigating the Effects of Dynamic Precision Scaling on Neural Network Training.D. Stuart, and I. Taras. CoRR, (2018)Bit-Tactical: Exploiting Ineffectual Computations in Convolutional Neural Networks: Which, Why, and How.A. Delmas, P. Judd, D. Stuart, Z. Poulos, M. Mahmoud, S. Sharify, M. Nikolic, and A. Moshovos. CoRR, (2018)Accelerating Image-Sensor-Based Deep Learning Applications.M. Mahmoud, D. Stuart, Z. Poulos, A. Lascorz, P. Judd, S. Sharify, M. Nikolic, K. Siu, I. Vivancos, J. Albericio and 1 other author(s). IEEE Micro, 39 (5): 26-35 (2019)Bit-Tactical: A Software/Hardware Approach to Exploiting Value and Bit Sparsity in Neural Networks.A. Lascorz, P. Judd, D. Stuart, Z. Poulos, M. Mahmoud, S. Sharify, M. Nikolic, K. Siu, and A. Moshovos. ASPLOS, page 749-763. ACM, (2019)ShapeShifter: Enabling Fine-Grain Data Width Adaptation in Deep Learning.A. Lascorz, S. Sharify, I. Vivancos, D. Stuart, O. Awad, P. Judd, M. Mahmoud, M. Nikolic, K. Siu, Z. Poulos and 1 other author(s). MICRO, page 28-41. ACM, (2019)Laconic deep learning inference acceleration.S. Sharify, A. Lascorz, M. Mahmoud, M. Nikolic, K. Siu, D. Stuart, Z. Poulos, and A. Moshovos. ISCA, page 304-317. ACM, (2019)Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning.A. Moshovos, J. Albericio, P. Judd, A. Delmas, S. Sharify, M. Mahmoud, T. Hetherington, M. Nikolic, D. Stuart, K. Siu and 3 other author(s). NEWCAS, page 356-360. IEEE, (2018)Memory Requirements for Convolutional Neural Network Hardware Accelerators.K. Siu, D. Stuart, M. Mahmoud, and A. Moshovos. IISWC, page 111-121. IEEE Computer Society, (2018)

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Disambiguation of "Stuart, Dylan Malone"

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Memory Requirements for Convolutional Neural Network Hardware Accelerators.

Please choose a person to relate this publication to

Sarah Malone

Helga Malone

Almut Malone

Stuart Taylor

Stuart Fiske

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Stuart, Dylan Malone"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Memory Requirements for Convolutional Neural Network Hardware Accelerators.

Please choose a person to relate this publication to

Sarah Malone

Helga Malone

Almut Malone

Stuart Taylor

Stuart Fiske

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Memory Requirements for Convolutional Neural Network Hardware Accelerators.