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Quantum circuit physical design methodology with emphasis on physical synthesis.

, , and . Quantum Inf. Process., 13 (2): 445-465 (2014)

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Improving Latency of Quantum Circuits by Gate Exchanging., , and . DSD, page 67-73. IEEE Computer Society, (2009)Quantum circuit physical design flow for the multiplexed trap architecture., and . Microprocess. Microsystems, (2016)Exact Physical Design of Quantum Circuits for Ion-Trap-based Quantum Architectures., , and . DATE, page 344-349. IEEE, (2021)AMPS: An Automated Mesochronous Pipeline Scheduler and Design Space Explorer for High Performance Digital Circuits., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (4): 1681-1692 (2022)A congestion-aware mixed integer linear programming model for placement and scheduling of quantum circuits with a two-level heuristic solution approach., and . Quantum Eng., (2021)Evaluation and Improvement of Quantum Synthesis Algorithms based on a Thorough Set of Metrics., , , and . DSD, page 490-493. IEEE Computer Society, (2008)LDPC decoder implementation using FPGA., , and . IST, page 167-173. IEEE, (2016)IoT-Based Anonymous Authentication Protocol Using Biometrics in Smart Homes., , and . ISCISC, page 114-121. IEEE, (2019)Exact Mapping of Quantum Circuit Partitions to Building Blocks of the SAQIP Architecture., , , and . ISVLSI, page 402-405. IEEE, (2022)Implementation of a jpeg object-oriented ASIP: a case study on a system-level design methodology., , , and . ACM Great Lakes Symposium on VLSI, page 329-334. ACM, (2007)