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Accelerating Generic Graph Neural Networks via Architecture, Compiler, Partition Method Co-Design.

, , , , , and . CoRR, (2023)

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Architectural Implications of Graph Neural Networks., , , , , and . IEEE Comput. Archit. Lett., 19 (1): 59-62 (2020)Ivory: Early-Stage Design Space Exploration Tool for Integrated Voltage Regulators., , , , , , , and . DAC, page 1:1-1:6. ACM, (2017)Block-Skim: Efficient Question Answering for Transformer., , , , , and . CoRR, (2021)Braum: Analyzing and Protecting Autonomous Machine Software Stack., , , , , and . ISSRE, page 85-96. IEEE, (2022)CODA: Improving Resource Utilization by Slimming and Co-locating DNN and CPU Jobs., , , , , , , and . ICDCS, page 853-863. IEEE, (2020)Dual-side Sparse Tensor Core., , , , , and . ISCA, page 1083-1095. IEEE, (2021)SALO: an efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences., , , , , and . DAC, page 571-576. ACM, (2022)DistSim: A performance model of large-scale hybrid distributed DNN training., , , , , , , , , and 1 other author(s). CF, page 112-122. ACM, (2023)AdaptGear: Accelerating GNN Training via Adaptive Subgraph-Level Kernels on GPUs., , , , , , , , , and . CF, page 52-62. ACM, (2023)GPU voltage noise: Characterization and hierarchical smoothing of spatial and temporal voltage noise interference in GPU architectures., , and . HPCA, page 161-173. IEEE Computer Society, (2015)