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Hybrid TFET-MOSFET circuits: An approach to design reliable ultra-low power circuits in the presence of process variation.

, , , and . VLSI-SoC, page 1-6. IEEE, (2016)

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Sign bit reduction encoding for low power applications., , and . DAC, page 214-217. ACM, (2005)An Efficient Clocking Scheme for On-Chip Communications., , , and . APCCAS, page 119-122. IEEE, (2006)Low Power Combinational Multipliers using Data-driven Signal Gating., and . APCCAS, page 1430-1433. IEEE, (2006)Scan-Based Structure with Reduced Static and Dynamic Power Consumption., , , , and . J. Low Power Electron., 2 (3): 477-487 (2006)Comparative study of asynchronous pipeline design methods., , , and . IEICE Electron. Express, 3 (8): 163-171 (2006)Dynamic power management with fuzzy decision support system., and . IEICE Electron. Express, 5 (19): 789-795 (2008)An efficent dynamic multicast routing protocol for distributing traffic in NOCs., , , , , , and . DATE, page 1064-1069. IEEE, (2009)An efficient network on-chip architecture based on isolating local and non-local communications., , , and . DATE, page 350-353. EDA Consortium San Jose, CA, USA / ACM DL, (2013)ByZFAD: a low switching activity architecture for shift-and-add multipliers., , and . SBCCI, page 179-183. ACM, (2006)Pipeline Event-driven No-race Charge recycling Logic (PENCL) for low power application., and . ICECS, page 220-223. IEEE, (2003)