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Wavelet spectral dimension reduction of hyperspectral imagery on a reconfigurable computer.

, , , and . FPT, page 399-402. IEEE, (2004)

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Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipelining., , and . FPGA, page 94-102. ACM, (2001)Reconfigurable hardware implementation of mesh routing in number field sieve factorization., , , and . FPT, page 263-270. IEEE, (2004)Exploiting system-level parallelism in the application development on a reconfigurable computer., , , , , and . FPT, page 443-446. IEEE, (2003)Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules., , , and . FPT, page 113-118. IEEE, (2012)Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs., , , and . FPT, page 128-135. IEEE, (2017)Face-off Between the CAESAR Lightweight Finalists: ACORN vs. Ascon., , , and . FPT, page 330-333. IEEE, (2018)High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign., , and . ARC, volume 12083 of Lecture Notes in Computer Science, page 247-257. Springer, (2020)High-Throughput Reconfigurable Computing: A Design Study of an IDEA Encryption Cryptosystem on the SRC-6e Reconfigurable Computer., , and . FPL, page 681-686. IEEE, (2005)Performance and Overhead in a Hybrid Reconfigurable Computer., , , , and . IPDPS, page 176. IEEE Computer Society, (2003)Face Recognition CAPTCHAs., and . AICT/ICIW, page 122. IEEE Computer Society, (2006)