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Instruction combining for coalescing memory accesses using global code motion., , and . Memory System Performance, page 2-11. ACM, (2004)Effective Null Pointer Check Elimination Utilizing Hardware Trap., , and . ASPLOS, page 139-149. ACM Press, (2000)A new idiom recognition framework for exploiting hardware-assist instructions., , , , and . ASPLOS, page 382-393. ACM, (2006)Overview of the IBM Java Just-in-Time Compiler., , , , , , , and . IBM Syst. J., 39 (1): 175-193 (2000)Partial redundancy elimination for access expressions by speculative code motion., , and . Softw. Pract. Exp., 34 (11): 1065-1090 (2004)Effective sign extension elimination for java., , and . ACM Trans. Program. Lang. Syst., 28 (1): 106-133 (2006)Idiom recognition framework using topological embedding., , , , and . ACM Trans. Archit. Code Optim., 10 (3): 13:1-13:34 (2013)Evolution of a Java just-in-time compiler for IA-32 platforms., , , , , , , , , and 2 other author(s). IBM J. Res. Dev., 48 (5-6): 767-796 (2004)Re-constructing high-level information for language-specific binary re-optimization., , , and . CGO, page 273-283. ACM, (2016)Automatic Optimize-time Validation for Binary Optimizers., , , , and . J. Inf. Process., (2022)