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Disambiguation of "Santambrogio, Marco Domenico"

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On How to Design Dataflow FPGA-Based Accelerators for Convolutional Neural Networks.

, , and . ISVLSI, page 639-644. IEEE Computer Society, (2017)

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Gabriele Santambrogio

Domenico Laurendi

Domenico Lupo

Domenico Castrigiano

Domenico Pavone

 

Other publications of authors with the same name

On How to Accelerate Iterative Stencil Loops: A Scalable Streaming-Based Approach., , , , and . ACM Trans. Archit. Code Optim., 12 (4): 53:1-53:26 (2016)A2B: An integrated framework for designing heterogeneous and reconfigurable systems., , , , , and . AHS, page 198-205. IEEE, (2013)On How FPGAs are Changing the Computer Security Panorama: An Educational Survey., , and . RTSI, page 80-85. IEEE, (2021)Autonomic Thread Scaling Library for QoS Management., and . EWiLi, volume 1464 of CEUR Workshop Proceedings, CEUR-WS.org, (2015)On How to Design Dataflow FPGA-Based Accelerators for Convolutional Neural Networks., , and . ISVLSI, page 639-644. IEEE Computer Society, (2017)cODA: An Open-Source Framework to Easily Design Context-Aware Android Apps., , , , and . EUC, page 33-38. IEEE Computer Society, (2014)lightweight autonomous bayesian optimization of Echo-State Networks., , and . ESANN, (2019)Analysis and Classification of Event-Related Potentials During Image Observation., , , , , , and . EMBC, page 1-4. IEEE, (2023)Runtime adaptation on dataflow HPC platforms., , , , , and . AHS, page 84-91. IEEE, (2013)Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (1): 151-164 (2017)