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Disambiguation of "Floridia, Andrea"

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Fault Grading Techniques of Software Test Libraries for Safety-Critical Applications.

, , and . IEEE Access, (2019)

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Andrea Witzenrath

Risikofaktoren für abdominelle Komplikationen nach kardiopulmonalem Bypass. Uni Erlangen-Nürnberg, (2009)

Andrea Rottach

Analysis of the cell cycle dependent dynamics of Dnmt1 and Np95 in living cells. Uni München, (2009)

Andrea Hruby

Die MAPKKK Bck1p des Zellwand-Integritätssignalwegs in der Bäckerhefe Saccharomyces cerevisiae. Uni Münster, (2009)

Michaela Andrea Fingas

Resultate nach radikaler Prostatektomie bei Patienten mit einem Prostatakarzinom Gleason 7-10. Uni Marburg, (2009)

Andrea Krause

 

Other publications of authors with the same name

On the development of a high-level fault simulator for the analysis of performance faults on speculative modules., , and . LATS, page 1-6. IEEE, (2017)Recent Trends and Perspectives on Defect-Oriented Testing., , , , , , , , , and 11 other author(s). IOLTS, page 1-10. IEEE, (2022)An analysis of test solutions for COTS-based systems in space applications., , , , , and . VLSI-SoC, page 59-64. IEEE, (2018)A comparative overview of ATPG flows targeting traditional and cell-aware fault models., , , , and . ICECS 2022, page 1-4. IEEE, (2022)Non-Intrusive Self-Test Library for Automotive Critical Applications: Constraints and Solutions., , , , , , , , and . DATE, page 920-923. IEEE, (2019)Improved Test Solutions for COTS-Based Systems in Space Applications., , , , , and . VLSI-SoC (Selected Papers), volume 561 of IFIP Advances in Information and Communication Technology, page 187-206. Springer, (2018)Targeting different defect-oriented fault models in IC testing: an experimental approach., , , , and . DSD, page 214-219. IEEE, (2023)Development flow of on-line Software Test Libraries for asynchronous processor cores., , and . IOLTS, page 73-78. IEEE, (2018)A Decentralized Scheduler for On-line Self-test Routines in Multi-core Automotive System-on-Chips., , , , , and . ITC, page 1-10. IEEE, (2019)A JTAG-based Fault Emulation Platform for Dependability Analyses of Processor-based ASICs., and . LASCAS, page 1-4. IEEE, (2021)