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Disambiguation of "Sánchez-Sinencio, Edgar"

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An On-Chip Loopback Block for RF Transceiver Built-In Test.

, , , and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (6): 444-448 (2009)

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A fully integrated highly linear efficient power amplifier in 0.25µm BiCMOS technology for wireless applications., , , , , , and . CICC, page 1-4. IEEE, (2011)Dynamic range, noise and linearity optimization of continuous-time OTA-C filters., , , and . ICECS, page 41-44. IEEE, (2004)Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives., and . LASCAS, page 1-4. IEEE, (2017)A new method for wavelets generation., , , , and . EUSIPCO, page 1-4. IEEE, (1996)Highly Linear Low-Power Wireless RF Receiver for WSN., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (5): 1007-1016 (2019)A Capacitor-Less LDO With High-Frequency PSR Suitable for a Wide Range of On-Chip Capacitive Loads., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (9): 2970-2982 (2016)A Reconfigurable Rectifier With Optimal Loading Point Determination for RF Energy Harvesting From -22 dBm to -2 dBm., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (1): 87-91 (2020)An On-Chip Loopback Block for RF Transceiver Built-In Test., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (6): 444-448 (2009)A fully parallel CMOS analog median filter., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 51-II (3): 116-123 (2004)Power-Aware Multiband-Multistandard CMOS Receiver System-Level Budgeting., , and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (7): 570-574 (2009)