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Frontend Frequency-Voltage Adaptation for Optimal Energy-Delay^2., , and . ICCD, page 250-255. IEEE Computer Society, (2004)Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power., , , , , , , and . IEEE PACT, page 141-152. IEEE Computer Society, (2002)On using network RAM as a non-volatile buffer., , , and . Clust. Comput., 2 (4): 295-303 (1999)Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture., , , and . ISLPED, page 49-54. ACM, (2006)Speculative hardware/software co-designed floating-point multiply-add fusion., , , , , , and . ASPLOS, page 623-638. ACM, (2014)Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling., , , , , and . HPCA, page 29-42. IEEE Computer Society, (2002)Distributing the Frontend for Temperature Reduction., , , and . HPCA, page 61-70. IEEE Computer Society, (2005)The Energy Impact of Aggressive Loop Fusion., , , , and . IEEE PACT, page 153-164. IEEE Computer Society, (2004)Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto's ET-SoC-1 Chip., , , , , , , , , and 23 other author(s). HCS, page 1-23. IEEE, (2021)Dynamically Trading Frequency for Complexity in a GALS Microprocessor., , , , and . MICRO, page 157-168. IEEE Computer Society, (2004)