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A 28-nm Convolutional Neuromorphic Processor Enabling Online Learning with Spike-Based Retinas.

, , and . ISCAS, page 1-5. IEEE, (2020)

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Gradient importance sampling: An efficient statistical extraction methodology of high-sigma SRAM dynamic characteristics., , , and . DATE, page 195-200. IEEE, (2018)CAMEL: An Ultra-Low-Power VGA CMOS Imager based on a Time-Based DPS Array., , , , , and . ICDSC, page 155-159. ACM, (2016)A 0.4V 0.08fJ/cycle retentive True-Single-Phase-Clock 18T Flip-Flop in 28nm FDSOI CMOS., and . ISCAS, page 1-4. IEEE, (2017)Efficient Multiple-Valued Signed-Digit Full Adder Based on NDR MOS Structures and its Application to an N-bit Current-Mode Constant-Time Adder., , , , and . J. Multiple Valued Log. Soft Comput., 13 (1-2): 61-78 (2007)A 0.4-V 0.66-fJ/Cycle Retentive True-Single-Phase-Clock 18T Flip-Flop in 28-nm Fully-Depleted SOI CMOS., and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (3): 935-945 (2018)Enhancing the Reliability of Dense LoRaWAN Networks With Multi-User Receivers., , , , and . IEEE Open J. Commun. Soc., (2021)Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications., , and . VLSI-SoC, page 1-6. IEEE, (2016)Comprehensive Analytical Comparison of Ring Oscillators in FDSOI Technology: Current Starving Versus Back-Bias Control., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (5): 1883-1895 (2022)Assessing the embodied carbon footprint of IoT edge devices with a bottom-up life-cycle approach., and . CoRR, (2021)The Environmental Footprint of IC Production: Meta-Analysis and Historical Trends., , , , , and . ESSDERC, page 352-355. IEEE, (2022)