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Timeloop: A Systematic Approach to DNN Accelerator Evaluation., , , , , , , , , and . ISPASS, page 304-315. IEEE, (2019)AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies., , , , , , , , , and . ISPD, page 175-183. ACM, (2022)Accelerating Chip Design with Machine Learning.. MLCAD, page 33. ACM, (2020)From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus., , , , and . ICPP, page 88:1-88:12. ACM, (2022)Generative self-supervised learning for gate sizing: invited., , , , , and . DAC, page 1331-1334. ACM, (2022)GPU design in a power-limited era.. MSE, page 68. IEEE Computer Society, (2013)FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning., , , , , , , , , and . ASP-DAC, page 19-25. IEEE, (2020)A 17-95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm., , , , , , , and . VLSI Technology and Circuits, page 16-17. IEEE, (2022)An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling., , , and . ICCAD, page 1-9. IEEE, (2023)Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session Paper., , , , , , , and . ICCAD, page 1-6. IEEE, (2021)