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Disambiguation of "Tseng, Po-Chih"

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Reconfigurable architecture for video applications.

, , , , and . SoCC, page 21-24. IEEE, (2007)

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Ju-po Tsêng

Matei Chihaia

Walid Shehab Chihab

Cristian Ionuţ Chihaia

Houssem-Eddine Chihoub

 

Other publications of authors with the same name

VLSI implementation of shape-adaptive discrete wavelet transform., , and . VCIP, volume 4671 of Proceedings of SPIE, page 655-666. SPIE, (2002)Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method., , and . ISCAS (5), page 565-568. IEEE, (2002)Reconfigurable discrete cosine transform processor for object-based video signal processing., , and . ISCAS (2), page 353-356. IEEE, (2004)Low-power parallel tree architecture for full search block-matching motion estimation., , and . ISCAS (2), page 313-316. IEEE, (2004)Advances in Hardware Architectures for Image and Video Coding - A Survey., , , , , and . Proc. IEEE, 93 (1): 184-197 (2005)Memory analysis and architecture for two-dimensional discrete wavelet transform., , and . ICASSP (5), page 13-16. IEEE, (2004)A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications., , , , , , , and . ISSCC, page 1626-1635. IEEE, (2006)Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method., , and . IEEE Trans. Circuits Syst. Video Techn., 15 (7): 910-920 (2005)Multimode Embedded Compression Codec Engine for Power-Aware Video Coding System., , and . IEEE Trans. Circuits Syst. Video Techn., 19 (2): 141-150 (2009)Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems., , and . VLSI Signal Processing, 41 (1): 35-47 (2005)