%0 Journal Article %1 journals/vlsisp/TalaveraJCC08 %A Talavera, Guillermo %A Jayapala, Murali %A Carrabina, Jordi %A Catthoor, Francky %D 2008 %J J. Signal Process. Syst. %K dblp %N 3 %P 271-284 %T Address Generation Optimization for Embedded High-Performance Processors: A Survey. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp53.html#TalaveraJCC08 %V 53

@article{journals/vlsisp/TalaveraJCC08, added-at = {2020-03-12T00:00:00.000+0100}, author = {Talavera, Guillermo and Jayapala, Murali and Carrabina, Jordi and Catthoor, Francky}, biburl = {https://www.bibsonomy.org/bibtex/23ef76c8b948e58f18a7163bd078be88d/dblp}, ee = {https://www.wikidata.org/entity/Q59342725}, interhash = {0308f8e0a422828d85194de06e6a20b4}, intrahash = {3ef76c8b948e58f18a7163bd078be88d}, journal = {J. Signal Process. Syst.}, keywords = {dblp}, number = 3, pages = {271-284}, timestamp = {2020-03-13T12:01:11.000+0100}, title = {Address Generation Optimization for Embedded High-Performance Processors: A Survey.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp53.html#TalaveraJCC08}, volume = 53, year = 2008 }