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%0 Conference Paper
%1 conf/irps/AsllaniCAFMP19
%A Asllani, Besar
%A Castellazzi, Alberto
%A Avino-Salvado, Oriol
%A Fayyaz, Asad
%A Morel, Hervé
%A Planson, Dominique
%B IRPS
%D 2019
%I IEEE
%K dblp
%P 1-6
%T VTH-Hysteresis and Interface States Characterisation in SiC Power MOSFETs with Planar and Trench Gate.
%U http://dblp.uni-trier.de/db/conf/irps/irps2019.html#AsllaniCAFMP19
%@ 978-1-5386-9504-3
@inproceedings{conf/irps/AsllaniCAFMP19,
added-at = {2024-02-05T00:00:00.000+0100},
author = {Asllani, Besar and Castellazzi, Alberto and Avino-Salvado, Oriol and Fayyaz, Asad and Morel, Hervé and Planson, Dominique},
biburl = {https://www.bibsonomy.org/bibtex/2f1c2e406b9b8fd4eebd91ee5b64832fd/dblp},
booktitle = {IRPS},
crossref = {conf/irps/2019},
ee = {https://doi.org/10.1109/IRPS.2019.8720612},
interhash = {046eaaef17d2829cf2860f2cba18c445},
intrahash = {f1c2e406b9b8fd4eebd91ee5b64832fd},
isbn = {978-1-5386-9504-3},
keywords = {dblp},
pages = {1-6},
publisher = {IEEE},
timestamp = {2024-04-10T16:55:06.000+0200},
title = {VTH-Hysteresis and Interface States Characterisation in SiC Power MOSFETs with Planar and Trench Gate.},
url = {http://dblp.uni-trier.de/db/conf/irps/irps2019.html#AsllaniCAFMP19},
year = 2019
}