%0 Conference Paper %1 conf/dsd/VelegalatiSK13 %A Velegalati, Rajesh %A Shah, Kinjal %A Kaps, Jens-Peter %B DSD %D 2013 %I IEEE Computer Society %K dblp %P 947-954 %T Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2013.html#VelegalatiSK13 %@ 978-1-4799-2978-8

@inproceedings{conf/dsd/VelegalatiSK13, added-at = {2023-03-23T00:00:00.000+0100}, author = {Velegalati, Rajesh and Shah, Kinjal and Kaps, Jens-Peter}, biburl = {https://www.bibsonomy.org/bibtex/2d576fb1566052a641f4a38a2e9549f64/dblp}, booktitle = {DSD}, crossref = {conf/dsd/2013}, ee = {https://doi.ieeecomputersociety.org/10.1109/DSD.2013.107}, interhash = {02a4801ae66e42f0a3e57508f401d83f}, intrahash = {d576fb1566052a641f4a38a2e9549f64}, isbn = {978-1-4799-2978-8}, keywords = {dblp}, pages = {947-954}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:11:49.000+0200}, title = {Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2013.html#VelegalatiSK13}, year = 2013 }