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Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques.

R. Velegalati, K. Shah, and J. Kaps. DSD, page 947-954. IEEE Computer Society, (2013)

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Rajesh Saiju

Hybrid Power System Modelling - Simulation and Energy Management Unit DevelopmentR. Saiju. Uni Kassel, (2008)

Rajesh Chitta

Rajesh Saiju

Rajesh Narasimha

Rajesh Kolli

Other publications of authors with the same name

Techniques to enable the use of Block RAMs on FPGAS with Dynamic and Differential Logic.R. Velegalati, and J. Kaps. ICECS, page 1244-1247. IEEE, (2010)Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.S. Aftabjahani, M. Tehranipoor, F. Farahmandi, B. Ahmed, R. Kastner, F. Restuccia, A. Meza, K. Ryan, N. Fern, J. Woudenberg and 4 other author(s). VTS, page 1-10. IEEE, (2023)Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques.R. Velegalati, K. Shah, and J. Kaps. DSD, page 947-954. IEEE Computer Society, (2013)DPA Resistant AES on FPGA Using Partial DDL.J. Kaps, and R. Velegalati. FCCM, page 273-280. IEEE Computer Society, (2010)DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs.R. Velegalati, and J. Kaps. FPL, page 385-390. IEEE, (2009)Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules.B. Brewster, E. Homsirikamol, R. Velegalati, and K. Gaj. FPT, page 113-118. IEEE, (2012)Investigation of DPA Resistance of Block RAMs in Cryptographic Implementations on FPGAs.S. Shah, R. Velegalati, J. Kaps, and D. Hwang. ReConFig, page 274-279. IEEE Computer Society, (2010)Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs.R. Velegalati, and J. Kaps. FPL, page 506-511. IEEE Computer Society, (2011)

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Disambiguation of "Velegalati, Rajesh"

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Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques.

Please choose a person to relate this publication to

Rajesh Saiju

Rajesh Chitta

Rajesh Saiju

Rajesh Narasimha

Rajesh Kolli

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Velegalati, Rajesh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques.

Please choose a person to relate this publication to

Rajesh Saiju

Rajesh Chitta

Rajesh Saiju

Rajesh Narasimha

Rajesh Kolli

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques.