%0 Journal Article %1 journals/jssc/VelBPVGP09 %A de Vel, Hans Van %A Buter, Berry A. J. %A van der Ploeg, Hendrik %A Vertregt, Maarten %A Geelen, Govert J. G. M. %A Paulus, Edward J. F. %D 2009 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 1047-1056 %T A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc44.html#VelBPVGP09 %V 44

@article{journals/jssc/VelBPVGP09, added-at = {2020-08-30T00:00:00.000+0200}, author = {de Vel, Hans Van and Buter, Berry A. J. and van der Ploeg, Hendrik and Vertregt, Maarten and Geelen, Govert J. G. M. and Paulus, Edward J. F.}, biburl = {https://www.bibsonomy.org/bibtex/2ef19b07702d9fe469cd7c17f2607c900/dblp}, ee = {https://doi.org/10.1109/JSSC.2009.2014702}, interhash = {15dab3eda6ea270e4acf796e1747ac48}, intrahash = {ef19b07702d9fe469cd7c17f2607c900}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {1047-1056}, timestamp = {2020-08-31T11:41:29.000+0200}, title = {A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc44.html#VelBPVGP09}, volume = 44, year = 2009 }