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A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS.

, , , , , and . IEEE J. Solid State Circuits, 44 (4): 1047-1056 (2009)

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High performance mixed signal: Business and technology., , and . ESSCIRC, page 1-8. IEEE, (2010)A Mixed-Signal Design Roadmap., , , , , and . IEEE Des. Test Comput., 18 (6): 34-46 (2001)A 25-Ms/s 8-bit CMOS A/D converter for embedded application., , , and . IEEE J. Solid State Circuits, 29 (8): 879-886 (August 1994)Digital Systems Power Management for High Performance Mixed Signal Platforms., , , , , , , , , and 1 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (4): 961-975 (2014)A 15-bit 30-MS/s 145-mW three-step ADC for imaging applications., , and . IEEE J. Solid State Circuits, 41 (7): 1572-1577 (2006)Standard cell library tuning for variability tolerant designs., , , and . DATE, page 1-6. European Design and Automation Association, (2014)A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS., , , , , and . IEEE J. Solid State Circuits, 44 (4): 1047-1056 (2009)A 15-bit 30 MS/s 145 mW three-step ADC for imaging applications., , and . ESSCIRC, page 161-164. IEEE, (2005)BiCMOS and CMOS: a long term relation., and . ICECS, page 768-771. IEEE, (1996)A forward body bias generator for digital CMOS circuits with supply voltage scaling., , , , , , and . ISCAS, page 2482-2485. IEEE, (2010)