%0 Journal Article %1 journals/tcad/Pomeranz04 %A Pomeranz, Irith %D 2004 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 1 %P 164-172 %T Constrained test generation for embedded synchronous sequential circuits with serial-input access. %U http://dblp.uni-trier.de/db/journals/tcad/tcad23.html#Pomeranz04 %V 23

@article{journals/tcad/Pomeranz04, added-at = {2020-09-24T00:00:00.000+0200}, author = {Pomeranz, Irith}, biburl = {https://www.bibsonomy.org/bibtex/204be7d9ccf20476a6db68212c71d4a70/dblp}, ee = {https://doi.org/10.1109/TCAD.2003.819886}, interhash = {24d8b7a30246f2cadfd98288fb149644}, intrahash = {04be7d9ccf20476a6db68212c71d4a70}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 1, pages = {164-172}, timestamp = {2020-09-25T11:49:34.000+0200}, title = {Constrained test generation for embedded synchronous sequential circuits with serial-input access.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad23.html#Pomeranz04}, volume = 23, year = 2004 }