%0 Conference Paper %1 conf/fpl/RavishankarGB18 %A Ravishankar, Chirag %A Gaitonde, Dinesh %A Bauer, Trevor %B FPL %D 2018 %I IEEE Computer Society %K dblp %P 16-20 %T Placement Strategies for 2.5D FPGA Fabric Architectures. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2018.html#RavishankarGB18 %@ 978-1-5386-8517-4

@inproceedings{conf/fpl/RavishankarGB18, added-at = {2023-03-24T00:00:00.000+0100}, author = {Ravishankar, Chirag and Gaitonde, Dinesh and Bauer, Trevor}, biburl = {https://www.bibsonomy.org/bibtex/2a751f949cda47255f0925f0767b34135/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2018}, ee = {https://doi.ieeecomputersociety.org/10.1109/FPL.2018.00010}, interhash = {25ecfae22694cc55f6956e74d90de132}, intrahash = {a751f949cda47255f0925f0767b34135}, isbn = {978-1-5386-8517-4}, keywords = {dblp}, pages = {16-20}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:51:47.000+0200}, title = {Placement Strategies for 2.5D FPGA Fabric Architectures.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2018.html#RavishankarGB18}, year = 2018 }