Inproceedings,
FPGA Based Novel High Speed DAQ System Design with Error Correction.
S. Mandal, S. Sau, A. Chakrabarti, J. Saini, S. Pal, and S. Chattopadhyay.ISVLSI, page 80-85. IEEE Computer Society, (2015)
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- conf/isvlsi/MandalSCSPC15
- entry type
- inproceedings
- booktitle
- ISVLSI
- year
- 2015
- pages
- 80-85
- publisher
- IEEE Computer Society
- crossref
- conf/isvlsi/2015
- ee
- https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2015.80
- isbn
- 978-1-4799-8719-1
- url
- http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2015.html#MandalSCSPC15
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%1 conf/isvlsi/MandalSCSPC15
%A Mandal, Swagata
%A Sau, Suman
%A Chakrabarti, Amlan
%A Saini, Jogendra
%A Pal, Sushanta Kumar
%A Chattopadhyay, Subhasish
%B ISVLSI
%D 2015
%I IEEE Computer Society
%K dblp
%P 80-85
%T FPGA Based Novel High Speed DAQ System Design with Error Correction.
%U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2015.html#MandalSCSPC15
%@ 978-1-4799-8719-1
@inproceedings{conf/isvlsi/MandalSCSPC15,
added-at = {2023-03-24T00:00:00.000+0100},
author = {Mandal, Swagata and Sau, Suman and Chakrabarti, Amlan and Saini, Jogendra and Pal, Sushanta Kumar and Chattopadhyay, Subhasish},
biburl = {https://www.bibsonomy.org/bibtex/2b485e3b7659a94a6acd84e161e18422c/dblp},
booktitle = {ISVLSI},
crossref = {conf/isvlsi/2015},
ee = {https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2015.80},
interhash = {3c79f5928a82eaefe547d1edb3d48470},
intrahash = {b485e3b7659a94a6acd84e161e18422c},
isbn = {978-1-4799-8719-1},
keywords = {dblp},
pages = {80-85},
publisher = {IEEE Computer Society},
timestamp = {2024-04-10T11:08:41.000+0200},
title = {FPGA Based Novel High Speed DAQ System Design with Error Correction.},
url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2015.html#MandalSCSPC15},
year = 2015
}