%0 Conference Paper %1 conf/vdat/ReddyNSV15 %A Reddy, Karri Manikantta %A Nithin, Kumar Y. B. %A Sharma, Dheeraj %A Vasantha, M. H. %B VDAT %D 2015 %I IEEE Computer Society %K dblp %P 1-6 %T Low power, high speed error tolerant multiplier using approximate adders. %U http://dblp.uni-trier.de/db/conf/vdat/vdat2015.html#ReddyNSV15 %@ 978-1-4799-1743-3

@inproceedings{conf/vdat/ReddyNSV15, added-at = {2023-03-24T00:00:00.000+0100}, author = {Reddy, Karri Manikantta and Nithin, Kumar Y. B. and Sharma, Dheeraj and Vasantha, M. H.}, biburl = {https://www.bibsonomy.org/bibtex/231158d5a33b3763667883867822b18b6/dblp}, booktitle = {VDAT}, crossref = {conf/vdat/2015}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVDAT.2015.7208150}, interhash = {4e32d5bd745417d9bff552ea3718a2a0}, intrahash = {31158d5a33b3763667883867822b18b6}, isbn = {978-1-4799-1743-3}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T13:46:11.000+0200}, title = {Low power, high speed error tolerant multiplier using approximate adders.}, url = {http://dblp.uni-trier.de/db/conf/vdat/vdat2015.html#ReddyNSV15}, year = 2015 }