%0 Journal Article %1 journals/jsac/YamanakaMY87 %A Yamanaka, Naoaki %A Miyanaga, Hiroshi %A Yamamoto, Yousuke %D 1987 %J IEEE J. Sel. Areas Commun. %K dblp %N 8 %P 1249-1255 %T High-Speed Time Division Switch for 32-Mbit/s Bearer Rate Signals. %U http://dblp.uni-trier.de/db/journals/jsac/jsac5.html#YamanakaMY87 %V 5

@article{journals/jsac/YamanakaMY87, added-at = {2020-04-02T00:00:00.000+0200}, author = {Yamanaka, Naoaki and Miyanaga, Hiroshi and Yamamoto, Yousuke}, biburl = {https://www.bibsonomy.org/bibtex/2ea2293d235b713d0c22eb48e113dc006/dblp}, ee = {https://doi.org/10.1109/JSAC.1987.1146648}, interhash = {5b1dfbac4b564ebd15cbb041015d548d}, intrahash = {ea2293d235b713d0c22eb48e113dc006}, journal = {IEEE J. Sel. Areas Commun.}, keywords = {dblp}, number = 8, pages = {1249-1255}, timestamp = {2020-04-03T11:50:24.000+0200}, title = {High-Speed Time Division Switch for 32-Mbit/s Bearer Rate Signals.}, url = {http://dblp.uni-trier.de/db/journals/jsac/jsac5.html#YamanakaMY87}, volume = 5, year = 1987 }