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- BibTeX key
- journals/jssc/SavojHAGIJJKLRTUWC13
- entry type
- article
- year
- 2013
- journal
- IEEE J. Solid State Circuits
- number
- 11
- pages
- 2582-2594
- volume
- 48
- ee
- https://doi.org/10.1109/JSSC.2013.2274824
- url
- http://dblp.uni-trier.de/db/journals/jssc/jssc48.html#SavojHAGIJJKLRTUWC13
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%1 journals/jssc/SavojHAGIJJKLRTUWC13
%A Savoj, Jafar
%A Hsieh, Kenny C.-H.
%A An, Fu-Tai
%A Gong, J.
%A Im, Jay
%A Jiang, Xuewen
%A Jose, Anup P.
%A Kireev, Vassili
%A Lim, Siok-Wei
%A Roldan, Arianne
%A Turker, D. Z.
%A Upadhyaya, Parag
%A Wu, Zhaoyin Daniel
%A Chang, Ken
%D 2013
%J IEEE J. Solid State Circuits
%K dblp
%N 11
%P 2582-2594
%T A Low-Power 0.5-6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc48.html#SavojHAGIJJKLRTUWC13
%V 48
@article{journals/jssc/SavojHAGIJJKLRTUWC13,
added-at = {2020-08-30T00:00:00.000+0200},
author = {Savoj, Jafar and Hsieh, Kenny C.-H. and An, Fu-Tai and Gong, J. and Im, Jay and Jiang, Xuewen and Jose, Anup P. and Kireev, Vassili and Lim, Siok-Wei and Roldan, Arianne and Turker, D. Z. and Upadhyaya, Parag and Wu, Zhaoyin Daniel and Chang, Ken},
biburl = {https://www.bibsonomy.org/bibtex/2f86d63807cbdf4604ce310932c5778cb/dblp},
ee = {https://doi.org/10.1109/JSSC.2013.2274824},
interhash = {66b3b536c03e5c3912c03f94ad55c555},
intrahash = {f86d63807cbdf4604ce310932c5778cb},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 11,
pages = {2582-2594},
timestamp = {2020-08-31T11:41:23.000+0200},
title = {A Low-Power 0.5-6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc48.html#SavojHAGIJJKLRTUWC13},
volume = 48,
year = 2013
}