%0 Conference Paper %1 conf/arc/DavisC16 %A Davis, James J. %A Cheung, Peter Y. K. %B ARC %D 2016 %E Bonato, Vanderlei %E Bouganis, Christos %E Gorgon, Marek %I Springer %K dblp %P 361-368 %T Reduced-precision Algorithm-based Fault Tolerance for FPGA-implemented Accelerators. %U http://dblp.uni-trier.de/db/conf/arc/arc2016.html#DavisC16 %V 9625 %@ 978-3-319-30480-9

@inproceedings{conf/arc/DavisC16, added-at = {2020-04-19T00:00:00.000+0200}, author = {Davis, James J. and Cheung, Peter Y. K.}, biburl = {https://www.bibsonomy.org/bibtex/250b698d9759b337aa67e26687842048d/dblp}, booktitle = {ARC}, crossref = {conf/arc/2016}, editor = {Bonato, Vanderlei and Bouganis, Christos and Gorgon, Marek}, ee = {https://doi.org/10.1007/978-3-319-30481-6_31}, interhash = {68b194be419258bb517232d6220483a3}, intrahash = {50b698d9759b337aa67e26687842048d}, isbn = {978-3-319-30480-9}, keywords = {dblp}, pages = {361-368}, publisher = {Springer}, series = {Lecture Notes in Computer Science}, timestamp = {2020-04-21T11:45:11.000+0200}, title = {Reduced-precision Algorithm-based Fault Tolerance for FPGA-implemented Accelerators.}, url = {http://dblp.uni-trier.de/db/conf/arc/arc2016.html#DavisC16}, volume = 9625, year = 2016 }