%0 Journal Article %1 journals/jssc/ZhuNSEKH17 %A Zhu, Junheng %A Nandwana, Romesh Kumar %A Shu, Guanghua %A Elkholy, Ahmed %A Kim, Seong Joong %A Hanumolu, Pavan Kumar %D 2017 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 8-20 %T A 0.0021 mm2 1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#ZhuNSEKH17 %V 52

@article{journals/jssc/ZhuNSEKH17, added-at = {2020-08-30T00:00:00.000+0200}, author = {Zhu, Junheng and Nandwana, Romesh Kumar and Shu, Guanghua and Elkholy, Ahmed and Kim, Seong Joong and Hanumolu, Pavan Kumar}, biburl = {https://www.bibsonomy.org/bibtex/2a60623189d002fc096450c197f73fa19/dblp}, ee = {https://doi.org/10.1109/JSSC.2016.2598768}, interhash = {90f09ea49cb869e88babe21a543636bf}, intrahash = {a60623189d002fc096450c197f73fa19}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {8-20}, timestamp = {2020-08-31T11:40:31.000+0200}, title = {A 0.0021 mm2 1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#ZhuNSEKH17}, volume = 52, year = 2017 }