Inproceedings,
Scalable FPGA graph model to detect routing faults.
L. Sterpone, G. Cabodi, S. Finocchiaro, C. Loiacono, F. Savarese, and B. Du.IOLTS, page 155-160. IEEE, (2016)
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- BibTeX key
- conf/iolts/SterponeCFLSD16
- entry type
- inproceedings
- booktitle
- IOLTS
- year
- 2016
- pages
- 155-160
- publisher
- IEEE
- crossref
- conf/iolts/2016
- ee
- https://doi.org/10.1109/IOLTS.2016.7604690
- isbn
- 978-1-5090-1507-8
- url
- http://dblp.uni-trier.de/db/conf/iolts/iolts2016.html#SterponeCFLSD16
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- please select -%0 Conference Paper
%1 conf/iolts/SterponeCFLSD16
%A Sterpone, Luca
%A Cabodi, Gianpiero
%A Finocchiaro, Sebastiano F.
%A Loiacono, Carmelo
%A Savarese, Francesco
%A Du, Boyang
%B IOLTS
%D 2016
%I IEEE
%K dblp
%P 155-160
%T Scalable FPGA graph model to detect routing faults.
%U http://dblp.uni-trier.de/db/conf/iolts/iolts2016.html#SterponeCFLSD16
%@ 978-1-5090-1507-8
@inproceedings{conf/iolts/SterponeCFLSD16,
added-at = {2017-09-25T00:00:00.000+0200},
author = {Sterpone, Luca and Cabodi, Gianpiero and Finocchiaro, Sebastiano F. and Loiacono, Carmelo and Savarese, Francesco and Du, Boyang},
biburl = {https://www.bibsonomy.org/bibtex/24e17a4e53cff7f57a9d3853cad92b177/dblp},
booktitle = {IOLTS},
crossref = {conf/iolts/2016},
ee = {https://doi.org/10.1109/IOLTS.2016.7604690},
interhash = {9ba906311781ebc51158f3ca6361d5b8},
intrahash = {4e17a4e53cff7f57a9d3853cad92b177},
isbn = {978-1-5090-1507-8},
keywords = {dblp},
pages = {155-160},
publisher = {IEEE},
timestamp = {2017-12-08T01:46:46.000+0100},
title = {Scalable FPGA graph model to detect routing faults.},
url = {http://dblp.uni-trier.de/db/conf/iolts/iolts2016.html#SterponeCFLSD16},
year = 2016
}