@inproceedings{conf/iscas/NebashiSHMTITMFKHEKOS14,
added-at = {2021-10-14T00:00:00.000+0200},
author = {Nebashi, Ryusuke and Sakimura, Noboru and Honjo, Hiroaki and Morioka, Ayuka and Tsuji, Yukihide and Ishihara, Kunihiko and Tokutome, Keiichi and Miura, Sadahiko and Fukami, Shunsuke and Kinoshita, Keizo and Hanyu, Takahiro and Endoh, Tetsuo and Kasai, Naoki and Ohno, Hideo and Sugibayashi, Tadahiko},
biburl = {https://www.bibsonomy.org/bibtex/28b3dbb23f45d9f65b8a814c943331c20/dblp},
booktitle = {ISCAS},
crossref = {conf/iscas/2014},
ee = {https://doi.org/10.1109/ISCAS.2014.6865453},
interhash = {19d976c0d2673bb9f447b6425d136b40},
intrahash = {8b3dbb23f45d9f65b8a814c943331c20},
isbn = {978-1-4799-3431-7},
keywords = {dblp},
pages = {1588-1591},
publisher = {IEEE},
timestamp = {2024-04-10T17:50:15.000+0200},
title = {A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing.},
url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2014.html#NebashiSHMTITMFKHEKOS14},
year = 2014
}