%0 Conference Paper %1 conf/apsipa/LeeWCCCG12 %A Lee, Jui-Sheng %A Wang, Sheng-Han %A Chou, Chih-Tai %A Chien, Cheng-An %A Chang, Hsiu-Cheng %A Guo, Jiun-In %B APSIPA %D 2012 %I IEEE %K dblp %P 1-4 %T An inter-frame/inter-view cache architecture design for multi-view video decoders. %U http://dblp.uni-trier.de/db/conf/apsipa/apsipa2012.html#LeeWCCCG12 %@ 978-1-4673-4863-8

@inproceedings{conf/apsipa/LeeWCCCG12, added-at = {2021-08-08T00:00:00.000+0200}, author = {Lee, Jui-Sheng and Wang, Sheng-Han and Chou, Chih-Tai and Chien, Cheng-An and Chang, Hsiu-Cheng and Guo, Jiun-In}, biburl = {https://www.bibsonomy.org/bibtex/2fc6b2a3376167545688b454310477d92/dblp}, booktitle = {APSIPA}, crossref = {conf/apsipa/2012}, ee = {https://ieeexplore.ieee.org/document/6411972/}, interhash = {a47adc831b81d7fcfabd462a00456c59}, intrahash = {fc6b2a3376167545688b454310477d92}, isbn = {978-1-4673-4863-8}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2024-04-10T05:48:58.000+0200}, title = {An inter-frame/inter-view cache architecture design for multi-view video decoders.}, url = {http://dblp.uni-trier.de/db/conf/apsipa/apsipa2012.html#LeeWCCCG12}, year = 2012 }